Browse Source

RISC-V: Add 64-bit gdb xml files.

Signed-off-by: Jim Wilson <jimw@sifive.com>
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Jim Wilson 2 months ago
parent
commit
c670970dc0
No account linked to committer's email address
5 changed files with 357 additions and 3 deletions
  1. 1
    0
      configure
  2. 3
    3
      gdb-xml/riscv-32bit-fpu.xml
  3. 47
    0
      gdb-xml/riscv-64bit-cpu.xml
  4. 250
    0
      gdb-xml/riscv-64bit-csr.xml
  5. 56
    0
      gdb-xml/riscv-64bit-fpu.xml

+ 1
- 0
configure View File

@@ -7521,6 +7521,7 @@ case "$target_name" in
7521 7521
     TARGET_BASE_ARCH=riscv
7522 7522
     TARGET_ABI_DIR=riscv
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     mttcg=yes
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+    gdb_xml_files="riscv-64bit-cpu.xml riscv-64bit-fpu.xml riscv-64bit-csr.xml"
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     target_compiler=$cross_cc_riscv64
7525 7526
   ;;
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   sh4|sh4eb)

+ 3
- 3
gdb-xml/riscv-32bit-fpu.xml View File

@@ -44,7 +44,7 @@
44 44
   <reg name="ft10" bitsize="32" type="ieee_single"/>
45 45
   <reg name="ft11" bitsize="32" type="ieee_single"/>
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-  <reg name="fflags" bitsize="32" type="int"/>
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-  <reg name="frm" bitsize="32" type="int"/>
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-  <reg name="fcsr" bitsize="32" type="int"/>
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+  <reg name="fflags" bitsize="32" type="int" regnum="66"/>
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+  <reg name="frm" bitsize="32" type="int" regnum="67"/>
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+  <reg name="fcsr" bitsize="32" type="int" regnum="68"/>
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 </feature>

+ 47
- 0
gdb-xml/riscv-64bit-cpu.xml View File

@@ -0,0 +1,47 @@
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+<?xml version="1.0"?>
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+<!-- Copyright (C) 2018-2019 Free Software Foundation, Inc.
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+
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+     Copying and distribution of this file, with or without modification,
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+     are permitted in any medium without royalty provided the copyright
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+     notice and this notice are preserved.  -->
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+
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+<!-- Register numbers are hard-coded in order to maintain backward
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+     compatibility with older versions of tools that didn't use xml
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+     register descriptions.  -->
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+
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+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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+<feature name="org.gnu.gdb.riscv.cpu">
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+  <reg name="zero" bitsize="64" type="int" regnum="0"/>
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+  <reg name="ra" bitsize="64" type="code_ptr"/>
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+  <reg name="sp" bitsize="64" type="data_ptr"/>
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+  <reg name="gp" bitsize="64" type="data_ptr"/>
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+  <reg name="tp" bitsize="64" type="data_ptr"/>
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+  <reg name="t0" bitsize="64" type="int"/>
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+  <reg name="t1" bitsize="64" type="int"/>
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+  <reg name="t2" bitsize="64" type="int"/>
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+  <reg name="fp" bitsize="64" type="data_ptr"/>
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+  <reg name="s1" bitsize="64" type="int"/>
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+  <reg name="a0" bitsize="64" type="int"/>
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+  <reg name="a1" bitsize="64" type="int"/>
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+  <reg name="a2" bitsize="64" type="int"/>
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+  <reg name="a3" bitsize="64" type="int"/>
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+  <reg name="a4" bitsize="64" type="int"/>
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+  <reg name="a5" bitsize="64" type="int"/>
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+  <reg name="a6" bitsize="64" type="int"/>
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+  <reg name="a7" bitsize="64" type="int"/>
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+  <reg name="s2" bitsize="64" type="int"/>
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+  <reg name="s3" bitsize="64" type="int"/>
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+  <reg name="s4" bitsize="64" type="int"/>
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+  <reg name="s5" bitsize="64" type="int"/>
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+  <reg name="s6" bitsize="64" type="int"/>
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+  <reg name="s7" bitsize="64" type="int"/>
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+  <reg name="s8" bitsize="64" type="int"/>
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+  <reg name="s9" bitsize="64" type="int"/>
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+  <reg name="s10" bitsize="64" type="int"/>
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+  <reg name="s11" bitsize="64" type="int"/>
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+  <reg name="t3" bitsize="64" type="int"/>
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+  <reg name="t4" bitsize="64" type="int"/>
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+  <reg name="t5" bitsize="64" type="int"/>
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+  <reg name="t6" bitsize="64" type="int"/>
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+  <reg name="pc" bitsize="64" type="code_ptr"/>
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+</feature>

+ 250
- 0
gdb-xml/riscv-64bit-csr.xml View File

@@ -0,0 +1,250 @@
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+<?xml version="1.0"?>
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+<!-- Copyright (C) 2018-2019 Free Software Foundation, Inc.
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+
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+     Copying and distribution of this file, with or without modification,
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+     are permitted in any medium without royalty provided the copyright
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+     notice and this notice are preserved.  -->
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+
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+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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+<feature name="org.gnu.gdb.riscv.csr">
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+  <reg name="ustatus" bitsize="64"/>
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+  <reg name="uie" bitsize="64"/>
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+  <reg name="utvec" bitsize="64"/>
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+  <reg name="uscratch" bitsize="64"/>
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+  <reg name="uepc" bitsize="64"/>
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+  <reg name="ucause" bitsize="64"/>
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+  <reg name="utval" bitsize="64"/>
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+  <reg name="uip" bitsize="64"/>
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+  <reg name="fflags" bitsize="64"/>
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+  <reg name="frm" bitsize="64"/>
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+  <reg name="fcsr" bitsize="64"/>
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+  <reg name="cycle" bitsize="64"/>
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+  <reg name="time" bitsize="64"/>
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+  <reg name="instret" bitsize="64"/>
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+  <reg name="hpmcounter3" bitsize="64"/>
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+  <reg name="hpmcounter4" bitsize="64"/>
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+  <reg name="hpmcounter5" bitsize="64"/>
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+  <reg name="hpmcounter6" bitsize="64"/>
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+  <reg name="hpmcounter7" bitsize="64"/>
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+  <reg name="hpmcounter8" bitsize="64"/>
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+  <reg name="hpmcounter9" bitsize="64"/>
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+  <reg name="hpmcounter10" bitsize="64"/>
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+  <reg name="hpmcounter11" bitsize="64"/>
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+  <reg name="hpmcounter12" bitsize="64"/>
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+  <reg name="hpmcounter13" bitsize="64"/>
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+  <reg name="hpmcounter14" bitsize="64"/>
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+  <reg name="hpmcounter15" bitsize="64"/>
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+  <reg name="hpmcounter16" bitsize="64"/>
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+  <reg name="hpmcounter17" bitsize="64"/>
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+  <reg name="hpmcounter18" bitsize="64"/>
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+  <reg name="hpmcounter19" bitsize="64"/>
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+  <reg name="hpmcounter20" bitsize="64"/>
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+  <reg name="hpmcounter21" bitsize="64"/>
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+  <reg name="hpmcounter22" bitsize="64"/>
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+  <reg name="hpmcounter23" bitsize="64"/>
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+  <reg name="hpmcounter24" bitsize="64"/>
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+  <reg name="hpmcounter25" bitsize="64"/>
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+  <reg name="hpmcounter26" bitsize="64"/>
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+  <reg name="hpmcounter27" bitsize="64"/>
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+  <reg name="hpmcounter28" bitsize="64"/>
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+  <reg name="hpmcounter29" bitsize="64"/>
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+  <reg name="hpmcounter30" bitsize="64"/>
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+  <reg name="hpmcounter31" bitsize="64"/>
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+  <reg name="cycleh" bitsize="64"/>
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+  <reg name="timeh" bitsize="64"/>
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+  <reg name="instreth" bitsize="64"/>
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+  <reg name="hpmcounter3h" bitsize="64"/>
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+  <reg name="hpmcounter4h" bitsize="64"/>
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+  <reg name="hpmcounter5h" bitsize="64"/>
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+  <reg name="hpmcounter6h" bitsize="64"/>
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+  <reg name="hpmcounter7h" bitsize="64"/>
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+  <reg name="hpmcounter8h" bitsize="64"/>
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+  <reg name="hpmcounter9h" bitsize="64"/>
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+  <reg name="hpmcounter10h" bitsize="64"/>
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+  <reg name="hpmcounter11h" bitsize="64"/>
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+  <reg name="hpmcounter12h" bitsize="64"/>
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+  <reg name="hpmcounter13h" bitsize="64"/>
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+  <reg name="hpmcounter14h" bitsize="64"/>
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+  <reg name="hpmcounter15h" bitsize="64"/>
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+  <reg name="hpmcounter16h" bitsize="64"/>
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+  <reg name="hpmcounter17h" bitsize="64"/>
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+  <reg name="hpmcounter18h" bitsize="64"/>
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+  <reg name="hpmcounter19h" bitsize="64"/>
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+  <reg name="hpmcounter20h" bitsize="64"/>
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+  <reg name="hpmcounter21h" bitsize="64"/>
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+  <reg name="hpmcounter22h" bitsize="64"/>
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+  <reg name="hpmcounter23h" bitsize="64"/>
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+  <reg name="hpmcounter24h" bitsize="64"/>
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+  <reg name="hpmcounter25h" bitsize="64"/>
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+  <reg name="hpmcounter26h" bitsize="64"/>
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+  <reg name="hpmcounter27h" bitsize="64"/>
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+  <reg name="hpmcounter28h" bitsize="64"/>
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+  <reg name="hpmcounter29h" bitsize="64"/>
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+  <reg name="hpmcounter30h" bitsize="64"/>
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+  <reg name="hpmcounter31h" bitsize="64"/>
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+  <reg name="sstatus" bitsize="64"/>
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+  <reg name="sedeleg" bitsize="64"/>
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+  <reg name="sideleg" bitsize="64"/>
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+  <reg name="sie" bitsize="64"/>
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+  <reg name="stvec" bitsize="64"/>
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+  <reg name="scounteren" bitsize="64"/>
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+  <reg name="sscratch" bitsize="64"/>
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+  <reg name="sepc" bitsize="64"/>
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+  <reg name="scause" bitsize="64"/>
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+  <reg name="stval" bitsize="64"/>
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+  <reg name="sip" bitsize="64"/>
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+  <reg name="satp" bitsize="64"/>
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+  <reg name="mvendorid" bitsize="64"/>
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+  <reg name="marchid" bitsize="64"/>
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+  <reg name="mimpid" bitsize="64"/>
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+  <reg name="mhartid" bitsize="64"/>
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+  <reg name="mstatus" bitsize="64"/>
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+  <reg name="misa" bitsize="64"/>
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+  <reg name="medeleg" bitsize="64"/>
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+  <reg name="mideleg" bitsize="64"/>
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+  <reg name="mie" bitsize="64"/>
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+  <reg name="mtvec" bitsize="64"/>
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+  <reg name="mcounteren" bitsize="64"/>
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+  <reg name="mscratch" bitsize="64"/>
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+  <reg name="mepc" bitsize="64"/>
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+  <reg name="mcause" bitsize="64"/>
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+  <reg name="mtval" bitsize="64"/>
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+  <reg name="mip" bitsize="64"/>
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+  <reg name="pmpcfg0" bitsize="64"/>
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+  <reg name="pmpcfg1" bitsize="64"/>
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+  <reg name="pmpcfg2" bitsize="64"/>
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+  <reg name="pmpcfg3" bitsize="64"/>
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+  <reg name="pmpaddr0" bitsize="64"/>
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+  <reg name="pmpaddr1" bitsize="64"/>
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+  <reg name="pmpaddr2" bitsize="64"/>
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+  <reg name="pmpaddr3" bitsize="64"/>
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+  <reg name="pmpaddr4" bitsize="64"/>
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+  <reg name="pmpaddr5" bitsize="64"/>
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+  <reg name="pmpaddr6" bitsize="64"/>
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+  <reg name="pmpaddr7" bitsize="64"/>
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+  <reg name="pmpaddr8" bitsize="64"/>
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+  <reg name="pmpaddr9" bitsize="64"/>
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+  <reg name="pmpaddr10" bitsize="64"/>
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+  <reg name="pmpaddr11" bitsize="64"/>
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+  <reg name="pmpaddr12" bitsize="64"/>
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+  <reg name="pmpaddr13" bitsize="64"/>
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+  <reg name="pmpaddr14" bitsize="64"/>
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+  <reg name="pmpaddr15" bitsize="64"/>
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+  <reg name="mcycle" bitsize="64"/>
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+  <reg name="minstret" bitsize="64"/>
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+  <reg name="mhpmcounter3" bitsize="64"/>
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+  <reg name="mhpmcounter4" bitsize="64"/>
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+  <reg name="mhpmcounter5" bitsize="64"/>
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+  <reg name="mhpmcounter6" bitsize="64"/>
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+  <reg name="mhpmcounter7" bitsize="64"/>
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+  <reg name="mhpmcounter8" bitsize="64"/>
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+  <reg name="mhpmcounter9" bitsize="64"/>
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+  <reg name="mhpmcounter10" bitsize="64"/>
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+  <reg name="mhpmcounter11" bitsize="64"/>
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+  <reg name="mhpmcounter12" bitsize="64"/>
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+  <reg name="mhpmcounter13" bitsize="64"/>
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+  <reg name="mhpmcounter14" bitsize="64"/>
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+  <reg name="mhpmcounter15" bitsize="64"/>
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+  <reg name="mhpmcounter16" bitsize="64"/>
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+  <reg name="mhpmcounter17" bitsize="64"/>
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+  <reg name="mhpmcounter18" bitsize="64"/>
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+  <reg name="mhpmcounter19" bitsize="64"/>
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+  <reg name="mhpmcounter20" bitsize="64"/>
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+  <reg name="mhpmcounter21" bitsize="64"/>
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+  <reg name="mhpmcounter22" bitsize="64"/>
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+  <reg name="mhpmcounter23" bitsize="64"/>
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+  <reg name="mhpmcounter24" bitsize="64"/>
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+  <reg name="mhpmcounter25" bitsize="64"/>
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+  <reg name="mhpmcounter26" bitsize="64"/>
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+  <reg name="mhpmcounter27" bitsize="64"/>
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+  <reg name="mhpmcounter28" bitsize="64"/>
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+  <reg name="mhpmcounter29" bitsize="64"/>
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+  <reg name="mhpmcounter30" bitsize="64"/>
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+  <reg name="mhpmcounter31" bitsize="64"/>
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+  <reg name="mcycleh" bitsize="64"/>
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+  <reg name="minstreth" bitsize="64"/>
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+  <reg name="mhpmcounter3h" bitsize="64"/>
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+  <reg name="mhpmcounter4h" bitsize="64"/>
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+  <reg name="mhpmcounter5h" bitsize="64"/>
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+  <reg name="mhpmcounter6h" bitsize="64"/>
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+  <reg name="mhpmcounter7h" bitsize="64"/>
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+  <reg name="mhpmcounter8h" bitsize="64"/>
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+  <reg name="mhpmcounter9h" bitsize="64"/>
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+  <reg name="mhpmcounter10h" bitsize="64"/>
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+  <reg name="mhpmcounter11h" bitsize="64"/>
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+  <reg name="mhpmcounter12h" bitsize="64"/>
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+  <reg name="mhpmcounter13h" bitsize="64"/>
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+  <reg name="mhpmcounter14h" bitsize="64"/>
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+  <reg name="mhpmcounter15h" bitsize="64"/>
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+  <reg name="mhpmcounter16h" bitsize="64"/>
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+  <reg name="mhpmcounter17h" bitsize="64"/>
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+  <reg name="mhpmcounter18h" bitsize="64"/>
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+  <reg name="mhpmcounter19h" bitsize="64"/>
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+  <reg name="mhpmcounter20h" bitsize="64"/>
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+  <reg name="mhpmcounter21h" bitsize="64"/>
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+  <reg name="mhpmcounter22h" bitsize="64"/>
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+  <reg name="mhpmcounter23h" bitsize="64"/>
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+  <reg name="mhpmcounter24h" bitsize="64"/>
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+  <reg name="mhpmcounter25h" bitsize="64"/>
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+  <reg name="mhpmcounter26h" bitsize="64"/>
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+  <reg name="mhpmcounter27h" bitsize="64"/>
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+  <reg name="mhpmcounter28h" bitsize="64"/>
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+  <reg name="mhpmcounter29h" bitsize="64"/>
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+  <reg name="mhpmcounter30h" bitsize="64"/>
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+  <reg name="mhpmcounter31h" bitsize="64"/>
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+  <reg name="mhpmevent3" bitsize="64"/>
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+  <reg name="mhpmevent4" bitsize="64"/>
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+  <reg name="mhpmevent5" bitsize="64"/>
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+  <reg name="mhpmevent6" bitsize="64"/>
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+  <reg name="mhpmevent7" bitsize="64"/>
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+  <reg name="mhpmevent8" bitsize="64"/>
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+  <reg name="mhpmevent9" bitsize="64"/>
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+  <reg name="mhpmevent10" bitsize="64"/>
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+  <reg name="mhpmevent11" bitsize="64"/>
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+  <reg name="mhpmevent12" bitsize="64"/>
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+  <reg name="mhpmevent13" bitsize="64"/>
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+  <reg name="mhpmevent14" bitsize="64"/>
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+  <reg name="mhpmevent15" bitsize="64"/>
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+  <reg name="mhpmevent16" bitsize="64"/>
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+  <reg name="mhpmevent17" bitsize="64"/>
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+  <reg name="mhpmevent18" bitsize="64"/>
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+  <reg name="mhpmevent19" bitsize="64"/>
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+  <reg name="mhpmevent20" bitsize="64"/>
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+  <reg name="mhpmevent21" bitsize="64"/>
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+  <reg name="mhpmevent22" bitsize="64"/>
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+  <reg name="mhpmevent23" bitsize="64"/>
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+  <reg name="mhpmevent24" bitsize="64"/>
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+  <reg name="mhpmevent25" bitsize="64"/>
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+  <reg name="mhpmevent26" bitsize="64"/>
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+  <reg name="mhpmevent27" bitsize="64"/>
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+  <reg name="mhpmevent28" bitsize="64"/>
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+  <reg name="mhpmevent29" bitsize="64"/>
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+  <reg name="mhpmevent30" bitsize="64"/>
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+  <reg name="mhpmevent31" bitsize="64"/>
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+  <reg name="tselect" bitsize="64"/>
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+  <reg name="tdata1" bitsize="64"/>
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+  <reg name="tdata2" bitsize="64"/>
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+  <reg name="tdata3" bitsize="64"/>
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+  <reg name="dcsr" bitsize="64"/>
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+  <reg name="dpc" bitsize="64"/>
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+  <reg name="dscratch" bitsize="64"/>
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+  <reg name="hstatus" bitsize="64"/>
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+  <reg name="hedeleg" bitsize="64"/>
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+  <reg name="hideleg" bitsize="64"/>
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+  <reg name="hie" bitsize="64"/>
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+  <reg name="htvec" bitsize="64"/>
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+  <reg name="hscratch" bitsize="64"/>
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+  <reg name="hepc" bitsize="64"/>
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+  <reg name="hcause" bitsize="64"/>
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+  <reg name="hbadaddr" bitsize="64"/>
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+  <reg name="hip" bitsize="64"/>
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+  <reg name="mbase" bitsize="64"/>
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+  <reg name="mbound" bitsize="64"/>
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+  <reg name="mibase" bitsize="64"/>
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+  <reg name="mibound" bitsize="64"/>
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+  <reg name="mdbase" bitsize="64"/>
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+  <reg name="mdbound" bitsize="64"/>
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+  <reg name="mucounteren" bitsize="64"/>
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+  <reg name="mscounteren" bitsize="64"/>
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+  <reg name="mhcounteren" bitsize="64"/>
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+</feature>

+ 56
- 0
gdb-xml/riscv-64bit-fpu.xml View File

@@ -0,0 +1,56 @@
1
+<?xml version="1.0"?>
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+<!-- Copyright (C) 2018-2019 Free Software Foundation, Inc.
3
+
4
+     Copying and distribution of this file, with or without modification,
5
+     are permitted in any medium without royalty provided the copyright
6
+     notice and this notice are preserved.  -->
7
+
8
+<!-- Register numbers are hard-coded in order to maintain backward
9
+     compatibility with older versions of tools that didn't use xml
10
+     register descriptions.  -->
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+
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+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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+<feature name="org.gnu.gdb.riscv.fpu">
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+
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+  <union id="riscv_double">
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+    <field name="float" type="ieee_single"/>
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+    <field name="double" type="ieee_double"/>
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+  </union>
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+
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+  <reg name="ft0" bitsize="64" type="riscv_double" regnum="33"/>
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+  <reg name="ft1" bitsize="64" type="riscv_double"/>
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+  <reg name="ft2" bitsize="64" type="riscv_double"/>
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+  <reg name="ft3" bitsize="64" type="riscv_double"/>
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+  <reg name="ft4" bitsize="64" type="riscv_double"/>
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+  <reg name="ft5" bitsize="64" type="riscv_double"/>
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+  <reg name="ft6" bitsize="64" type="riscv_double"/>
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+  <reg name="ft7" bitsize="64" type="riscv_double"/>
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+  <reg name="fs0" bitsize="64" type="riscv_double"/>
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+  <reg name="fs1" bitsize="64" type="riscv_double"/>
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+  <reg name="fa0" bitsize="64" type="riscv_double"/>
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+  <reg name="fa1" bitsize="64" type="riscv_double"/>
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+  <reg name="fa2" bitsize="64" type="riscv_double"/>
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+  <reg name="fa3" bitsize="64" type="riscv_double"/>
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+  <reg name="fa4" bitsize="64" type="riscv_double"/>
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+  <reg name="fa5" bitsize="64" type="riscv_double"/>
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+  <reg name="fa6" bitsize="64" type="riscv_double"/>
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+  <reg name="fa7" bitsize="64" type="riscv_double"/>
38
+  <reg name="fs2" bitsize="64" type="riscv_double"/>
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+  <reg name="fs3" bitsize="64" type="riscv_double"/>
40
+  <reg name="fs4" bitsize="64" type="riscv_double"/>
41
+  <reg name="fs5" bitsize="64" type="riscv_double"/>
42
+  <reg name="fs6" bitsize="64" type="riscv_double"/>
43
+  <reg name="fs7" bitsize="64" type="riscv_double"/>
44
+  <reg name="fs8" bitsize="64" type="riscv_double"/>
45
+  <reg name="fs9" bitsize="64" type="riscv_double"/>
46
+  <reg name="fs10" bitsize="64" type="riscv_double"/>
47
+  <reg name="fs11" bitsize="64" type="riscv_double"/>
48
+  <reg name="ft8" bitsize="64" type="riscv_double"/>
49
+  <reg name="ft9" bitsize="64" type="riscv_double"/>
50
+  <reg name="ft10" bitsize="64" type="riscv_double"/>
51
+  <reg name="ft11" bitsize="64" type="riscv_double"/>
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+
53
+  <reg name="fflags" bitsize="32" type="int" regnum="66"/>
54
+  <reg name="frm" bitsize="32" type="int" regnum="67"/>
55
+  <reg name="fcsr" bitsize="32" type="int" regnum="68"/>
56
+</feature>

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